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authorJim Grosbach <grosbach@apple.com>2010-12-06 18:47:44 +0000
committerJim Grosbach <grosbach@apple.com>2010-12-06 18:47:44 +0000
commit67f13b19b5aee00833f33e9d4198a5698eece4ec (patch)
treeb7a67942c74bd9b1f582c4036c94877f8acc1d1b /llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
parentbf62d647de980ba01cd2f3f47adc9bc1b7ec3d19 (diff)
downloadbcm5719-llvm-67f13b19b5aee00833f33e9d4198a5698eece4ec.tar.gz
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Trailing whitespace.
llvm-svn: 121024
Diffstat (limited to 'llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index cdea8d36e00..78433e99f55 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -717,7 +717,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
NewLdOpc = ARM::t2LDRSBi12;
else
llvm_unreachable("Not a known opcode?");
-
+
unsigned DstReg = MI.getOperand(0).getReg();
bool DstIsDead = MI.getOperand(0).isDead();
MachineInstrBuilder MIB =
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