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author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-23 02:46:52 +0000 |
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committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-23 02:46:52 +0000 |
commit | 6307eb551822a925c3a39ae1c814e4b46893a4b4 (patch) | |
tree | 08715dd004161c2809f203f3c19161af6261cfa3 /llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
parent | b3613fce19b0fd154d38b044196357afdc335f8d (diff) | |
download | bcm5719-llvm-6307eb551822a925c3a39ae1c814e4b46893a4b4.tar.gz bcm5719-llvm-6307eb551822a925c3a39ae1c814e4b46893a4b4.zip |
CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest). All of these
functions require non-null parameters already, so references are more
clear. As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.
No functionality change intended.
llvm-svn: 261605
Diffstat (limited to 'llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 56f3498e120..5c4182bb4f3 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -651,7 +651,7 @@ void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB, MachineInstr &MI = *MBBI; unsigned Opcode = MI.getOpcode(); unsigned PredReg = 0; - ARMCC::CondCodes Pred = getInstrPredicate(&MI, PredReg); + ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); unsigned DstReg = MI.getOperand(0).getReg(); bool DstIsDead = MI.getOperand(0).isDead(); bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm; |