Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,

which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.

llvm-svn: 121721

1 files changed, 5 insertions, 5 deletions

diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
index 8066cb735b1..9434ecf40bd 100644
--- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -594,7 +594,7 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
             NegOk = true;
             IsSoImm = true;
             break;
-          case ARM::t2LEApcrel:
+          case ARM::t2ADR:
             Bits = 12;
             NegOk = true;
             break;
@@ -1555,7 +1555,7 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
     unsigned Bits = 0;
     switch (Opcode) {
     default: break;
-    case ARM::t2LEApcrel:
+    case ARM::t2ADR:
       if (isARMLowRegister(U.MI->getOperand(0).getReg())) {
         NewOpc = ARM::tLEApcrel;
         Bits = 8;
@@ -1754,16 +1754,16 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
       if (!OptOk)
         continue;
 
-      // Now scan back again to find the tLEApcrel or t2LEApcrelJT instruction
+      // Now scan back again to find the tLEApcrel or t2ADR instruction
       // that gave us the initial base register definition.
       for (--PrevI; PrevI != B && !PrevI->definesRegister(BaseReg); --PrevI)
         ;
 
-      // The instruction should be a tLEApcrel or t2LEApcrelJT; we want
+      // The instruction should be a tLEApcrel or t2ADR; we want
       // to delete it as well.
       MachineInstr *LeaMI = PrevI;
       if ((LeaMI->getOpcode() != ARM::tLEApcrelJT &&
-           LeaMI->getOpcode() != ARM::t2LEApcrelJT) ||
+           LeaMI->getOpcode() != ARM::t2ADR) ||
           LeaMI->getOperand(0).getReg() != BaseReg)
         OptOk = false;