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| author | Bob Wilson <bob.wilson@apple.com> | 2009-05-19 10:02:36 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-05-19 10:02:36 +0000 |
| commit | e666cc5206366883d31825a0a9bb0fc3dfbdb9fe (patch) | |
| tree | 3e2ca8974a810e069bfe954df6fb66d184fc110b /llvm/lib/Target/ARM/ARMCallingConv.td | |
| parent | a2c462bbe901c59c1aa49afef54ce29017c271fa (diff) | |
| download | bcm5719-llvm-e666cc5206366883d31825a0a9bb0fc3dfbdb9fe.tar.gz bcm5719-llvm-e666cc5206366883d31825a0a9bb0fc3dfbdb9fe.zip | |
Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
the stack. Patch by Sandeep Patel.
llvm-svn: 72106
Diffstat (limited to 'llvm/lib/Target/ARM/ARMCallingConv.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCallingConv.td | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMCallingConv.td b/llvm/lib/Target/ARM/ARMCallingConv.td index 5cba810d472..6cd786eed4d 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.td +++ b/llvm/lib/Target/ARM/ARMCallingConv.td @@ -51,11 +51,14 @@ def CC_ARM_AAPCS : CallingConv<[ // i64/f64 is passed in even pairs of GPRs // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register + // (and the same is true for f64 if VFP is not enabled) CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>, CCIfType<[f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>, CCIfType<[f32], CCBitConvertToType<i32>>, - CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>, + CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&" + "ArgFlags.getOrigAlign() != 8", + CCAssignToReg<[R0, R1, R2, R3]>>>, CCIfType<[i32], CCAssignToStack<4, 4>>, CCIfType<[f64], CCAssignToStack<8, 8>> |
