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authorDiana Picus <diana.picus@linaro.org>2017-02-21 11:33:59 +0000
committerDiana Picus <diana.picus@linaro.org>2017-02-21 11:33:59 +0000
commit613b65696a04a29047fe1628c1f6e3587cc024ee (patch)
tree13166fb72a9c9d30fe7d3743ab6b2e36fc09551d /llvm/lib/Target/ARM/ARMCallLowering.cpp
parentba5df6dea5194099a740ed09c48c3080a14210b6 (diff)
downloadbcm5719-llvm-613b65696a04a29047fe1628c1f6e3587cc024ee.tar.gz
bcm5719-llvm-613b65696a04a29047fe1628c1f6e3587cc024ee.zip
[ARM] GlobalISel: Lower calls to void() functions
For now, we hardcode a BLX instruction, and generate an ADJCALLSTACKDOWN/UP pair with amount 0. llvm-svn: 295716
Diffstat (limited to 'llvm/lib/Target/ARM/ARMCallLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMCallLowering.cpp35
1 files changed, 35 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMCallLowering.cpp b/llvm/lib/Target/ARM/ARMCallLowering.cpp
index d79d9173635..64e870cd1f0 100644
--- a/llvm/lib/Target/ARM/ARMCallLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMCallLowering.cpp
@@ -304,3 +304,38 @@ bool ARMCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
AssignFn);
return handleAssignments(MIRBuilder, ArgInfos, ArgHandler);
}
+
+bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
+ const MachineOperand &Callee,
+ const ArgInfo &OrigRet,
+ ArrayRef<ArgInfo> OrigArgs) const {
+ const MachineFunction &MF = MIRBuilder.getMF();
+ const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+
+ if (MF.getSubtarget<ARMSubtarget>().genLongCalls())
+ return false;
+
+ // FIXME: Support calling functions with arguments.
+ if (OrigArgs.size() > 0)
+ return false;
+
+ // FIXME: Support calling functions with return types.
+ if (!OrigRet.Ty->isVoidTy())
+ return false;
+
+ MIRBuilder.buildInstr(ARM::ADJCALLSTACKDOWN)
+ .addImm(0)
+ .add(predOps(ARMCC::AL));
+
+ MIRBuilder.buildInstr(ARM::BLX)
+ .add(Callee)
+ // FIXME: Don't hardcode the calling conv here...
+ .addRegMask(TRI->getCallPreservedMask(MF, CallingConv::ARM_AAPCS));
+
+ MIRBuilder.buildInstr(ARM::ADJCALLSTACKUP)
+ .addImm(0)
+ .addImm(0)
+ .add(predOps(ARMCC::AL));
+
+ return true;
+}
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