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authorJim Grosbach <grosbach@apple.com>2010-10-27 00:19:44 +0000
committerJim Grosbach <grosbach@apple.com>2010-10-27 00:19:44 +0000
commit5a7c7154703daeddbe7752116e07bd2114971f43 (patch)
tree84400052586b0095f00f1bbf7a4812253eb5e8ad /llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
parenta92801b6952b3f0325373f46c00955d03230795e (diff)
downloadbcm5719-llvm-5a7c7154703daeddbe7752116e07bd2114971f43.tar.gz
bcm5719-llvm-5a7c7154703daeddbe7752116e07bd2114971f43.zip
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
rdar://8477752. llvm-svn: 117419
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index e6e7892774f..1686124b825 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1376,7 +1376,7 @@ needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
// return false for everything else.
unsigned Opc = MI->getOpcode();
switch (Opc) {
- case ARM::LDRi12: case ARM::LDRH: case ARM::LDRB:
+ case ARM::LDRi12: case ARM::LDRH: case ARM::LDRBi12:
case ARM::STR: case ARM::STRH: case ARM::STRB:
case ARM::t2LDRi12: case ARM::t2LDRi8:
case ARM::t2STRi12: case ARM::t2STRi8:
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