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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 00:50:49 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 00:50:49 +0000 |
| commit | 35cea3da3562e9eecd36242393d9f8bccbcea13b (patch) | |
| tree | 51b9ff89446922262b3b342a228c527adb584fb1 /llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | |
| parent | 098321c1454fff7f86200d252f60ad9f8720d658 (diff) | |
| download | bcm5719-llvm-35cea3da3562e9eecd36242393d9f8bccbcea13b.tar.gz bcm5719-llvm-35cea3da3562e9eecd36242393d9f8bccbcea13b.zip | |
Provide AltOrders for specifying alternative allocation orders.
A register class can define AltOrders and AltOrderSelect instead of
defining method protos and bodies. The AltOrders lists can be defined
with set operations, and TableGen can verify that the alternative
allocation orders only contain valid registers.
This is currently an opt-in feature, and it is still possible to
override allocation_order_begin/end. That will not be true for long.
llvm-svn: 133320
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp')
0 files changed, 0 insertions, 0 deletions
