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| author | Bill Wendling <isanbard@gmail.com> | 2010-08-11 00:23:00 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-08-11 00:23:00 +0000 |
| commit | 79553bad506a5514eb06af4efb5f3b2e1fbe50cd (patch) | |
| tree | edd9fb42d194e950ded375991b4bf1275c4b002f /llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | |
| parent | 920f74aaabe89d70a18e3daabc58117e501197ac (diff) | |
| download | bcm5719-llvm-79553bad506a5514eb06af4efb5f3b2e1fbe50cd.tar.gz bcm5719-llvm-79553bad506a5514eb06af4efb5f3b2e1fbe50cd.zip | |
Handle ARM compares as well as converting for ARM adds, subs, and thumb2's adds.
llvm-svn: 110762
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 5881a121a9d..7e166d52737 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1358,6 +1358,8 @@ bool ARMBaseInstrInfo:: AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { switch (MI->getOpcode()) { default: break; + case ARM::CMPri: + case ARM::CMPzri: case ARM::t2CMPri: case ARM::t2CMPzri: SrcReg = MI->getOperand(0).getReg(); @@ -1398,6 +1400,9 @@ ConvertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr) const { // Set the "zero" bit in CPSR. switch (MI->getOpcode()) { default: break; + case ARM::ADDri: + case ARM::SUBri: + case ARM::t2ADDri: case ARM::t2SUBri: { MI->RemoveOperand(5); MachineInstrBuilder MB(MI); |
