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author | Benjamin Kramer <benny.kra@googlemail.com> | 2014-10-09 19:50:39 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2014-10-09 19:50:39 +0000 |
commit | 2c3778dc51512420364910a7af3ccc890661687f (patch) | |
tree | 3633b22441bf259652c29f71324a707695d33ca9 /llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | |
parent | cbbd3df8361ba8907c6a66d367741e7a7813b361 (diff) | |
download | bcm5719-llvm-2c3778dc51512420364910a7af3ccc890661687f.tar.gz bcm5719-llvm-2c3778dc51512420364910a7af3ccc890661687f.zip |
Remove a compiler bug workaround from 2007. The affected versions of gcc are long gone.
NFC.
llvm-svn: 219433
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index ee0143e2e5d..fdb31c88cce 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -594,16 +594,6 @@ template <> bool IsCPSRDead<MachineInstr>(MachineInstr *MI) { } } -/// FIXME: Works around a gcc miscompilation with -fstrict-aliasing. -LLVM_ATTRIBUTE_NOINLINE -static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT, - unsigned JTI); -static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT, - unsigned JTI) { - assert(JTI < JT.size()); - return JT[JTI].MBBs.size(); -} - /// GetInstSize - Return the size of the specified MachineInstr. /// unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { @@ -676,7 +666,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { // bytes, we can use 16-bit entries instead. Then there won't be an // alignment issue. unsigned InstSize = (Opc == ARM::tBR_JTr || Opc == ARM::t2BR_JT) ? 2 : 4; - unsigned NumEntries = getNumJTEntries(JT, JTI); + unsigned NumEntries = JT[JTI].MBBs.size(); if (Opc == ARM::t2TBB_JT && (NumEntries & 1)) // Make sure the instruction that follows TBB is 2-byte aligned. // FIXME: Constant island pass should insert an "ALIGN" instruction |