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author | Robin Morisset <morisset@google.com> | 2014-08-29 21:53:01 +0000 |
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committer | Robin Morisset <morisset@google.com> | 2014-08-29 21:53:01 +0000 |
commit | 039781ef269c61139d902b0cf8c78096d7318d9f (patch) | |
tree | 24631595cdf0fb8f1c20873b26bdb3d6a503d16f /llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | |
parent | ae08e431ddc1d981afa9a16a3e2041a6213846d8 (diff) | |
download | bcm5719-llvm-039781ef269c61139d902b0cf8c78096d7318d9f.tar.gz bcm5719-llvm-039781ef269c61139d902b0cf8c78096d7318d9f.zip |
Fix typos in comments, NFC
Summary: Just fixing comments, no functional change.
Test Plan: N/A
Reviewers: jfb
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D5130
llvm-svn: 216784
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 0d38b2ab199..8ea87f9930c 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -2889,7 +2889,7 @@ static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, // FIXME: The current MachineInstr design does not support relying on machine // mem operands to determine the width of a memory access. Instead, we expect // the target to provide this information based on the instruction opcode and -// operands. However, using MachineMemOperand is a the best solution now for +// operands. However, using MachineMemOperand is the best solution now for // two reasons: // // 1) getNumMicroOps tries to infer LDM memory width from the total number of MI |