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authorJim Grosbach <grosbach@apple.com>2010-12-09 01:23:51 +0000
committerJim Grosbach <grosbach@apple.com>2010-12-09 01:23:51 +0000
commit6233189713798c3bba3410dc3a5255a1961a4ba4 (patch)
treede5d9df37b9944dd2d9f2a5f904a6ab3dedbaf62 /llvm/lib/Target/ARM/ARMAsmPrinter.cpp
parented40288eb496bc01ae83bd0ea52cdb881e4fe0e6 (diff)
downloadbcm5719-llvm-6233189713798c3bba3410dc3a5255a1961a4ba4.tar.gz
bcm5719-llvm-6233189713798c3bba3410dc3a5255a1961a4ba4.zip
Add a textual message to the assert.
llvm-svn: 121349
Diffstat (limited to 'llvm/lib/Target/ARM/ARMAsmPrinter.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMAsmPrinter.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index 901a4ab7edd..09124e49078 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -720,7 +720,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case ARM::t2ADDrSPi12:
case ARM::t2SUBrSPi:
case ARM::t2SUBrSPi12:
- assert (MI->getOperand(1).getReg() == ARM::SP);
+ assert ((MI->getOperand(1).getReg() == ARM::SP) &&
+ "Unexpected source register!");
break;
case ARM::t2MOVi32imm: assert(0 && "Should be lowered by thumb2it pass");
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