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authorDan Gohman <gohman@apple.com>2009-09-25 20:36:54 +0000
committerDan Gohman <gohman@apple.com>2009-09-25 20:36:54 +0000
commit48b185d6f718f0408a54bc7be8387beb3237cff3 (patch)
tree035d97f04129d02bb447c2b4914c7919e4aac0e9 /llvm/lib/Target/ARM/ARMAddressingModes.h
parent49850dfc4eb10f83798c5c383205d9154c73e5b0 (diff)
downloadbcm5719-llvm-48b185d6f718f0408a54bc7be8387beb3237cff3.tar.gz
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Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. llvm-svn: 82794
Diffstat (limited to 'llvm/lib/Target/ARM/ARMAddressingModes.h')
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