summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARM.h
diff options
context:
space:
mode:
authorRafael Espindola <rafael.espindola@gmail.com>2006-09-02 20:24:25 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2006-09-02 20:24:25 +0000
commitc585b6919bfdf3ffcba8f532434025702013739a (patch)
tree506adc9f28e3aa279e1f32cfac90807cdd5e4eaf /llvm/lib/Target/ARM/ARM.h
parent8e5599354a4eccd7bc801364ba8739e12d2629ad (diff)
downloadbcm5719-llvm-c585b6919bfdf3ffcba8f532434025702013739a.tar.gz
bcm5719-llvm-c585b6919bfdf3ffcba8f532434025702013739a.zip
add more condition codes
llvm-svn: 30056
Diffstat (limited to 'llvm/lib/Target/ARM/ARM.h')
-rw-r--r--llvm/lib/Target/ARM/ARM.h30
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h
index 62f2a0d2ee3..7e49ae21180 100644
--- a/llvm/lib/Target/ARM/ARM.h
+++ b/llvm/lib/Target/ARM/ARM.h
@@ -23,16 +23,42 @@ namespace llvm {
// Enums corresponding to ARM condition codes
namespace ARMCC {
enum CondCodes {
+ EQ,
NE,
- EQ
+ CS,
+ CC,
+ MI,
+ PL,
+ VS,
+ VC,
+ HI,
+ LS,
+ GE,
+ LT,
+ GT,
+ LE,
+ AL
};
}
static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
default: assert(0 && "Unknown condition code");
- case ARMCC::NE: return "ne";
case ARMCC::EQ: return "eq";
+ case ARMCC::NE: return "ne";
+ case ARMCC::CS: return "cs";
+ case ARMCC::CC: return "cc";
+ case ARMCC::MI: return "mi";
+ case ARMCC::PL: return "pl";
+ case ARMCC::VS: return "vs";
+ case ARMCC::VC: return "vc";
+ case ARMCC::HI: return "hi";
+ case ARMCC::LS: return "ls";
+ case ARMCC::GE: return "ge";
+ case ARMCC::LT: return "lt";
+ case ARMCC::GT: return "gt";
+ case ARMCC::LE: return "le";
+ case ARMCC::AL: return "al";
}
}
OpenPOWER on IntegriCloud