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authorAnna Welker <anna.welker@arm.com>2020-01-08 13:08:27 +0000
committerAnna Welker <anna.welker@arm.com>2020-01-08 13:43:12 +0000
commit346f6b54bd1237a9a5a2d9bb1e424b57dc178998 (patch)
tree7208adf580a9343feefc817765407cbda3839ef0 /llvm/lib/Target/ARM/ARM.h
parent55a51e1c79a21080289ba88d5eac4bbe54ec4272 (diff)
downloadbcm5719-llvm-346f6b54bd1237a9a5a2d9bb1e424b57dc178998.tar.gz
bcm5719-llvm-346f6b54bd1237a9a5a2d9bb1e424b57dc178998.zip
[ARM][MVE] Enable masked gathers from vector of pointers
Adds a pass to the ARM backend that takes a v4i32 gather and transforms it into a call to MVE's masked gather intrinsics. Differential Revision: https://reviews.llvm.org/D71743
Diffstat (limited to 'llvm/lib/Target/ARM/ARM.h')
-rw-r--r--llvm/lib/Target/ARM/ARM.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h
index 9076c191d83..3412813a3ef 100644
--- a/llvm/lib/Target/ARM/ARM.h
+++ b/llvm/lib/Target/ARM/ARM.h
@@ -53,6 +53,7 @@ FunctionPass *createThumb2SizeReductionPass(
InstructionSelector *
createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI,
const ARMRegisterBankInfo &RBI);
+Pass *createMVEGatherScatterLoweringPass();
void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
ARMAsmPrinter &AP);
@@ -67,6 +68,7 @@ void initializeThumb2ITBlockPass(PassRegistry &);
void initializeMVEVPTBlockPass(PassRegistry &);
void initializeARMLowOverheadLoopsPass(PassRegistry &);
void initializeMVETailPredicationPass(PassRegistry &);
+void initializeMVEGatherScatterLoweringPass(PassRegistry &);
} // end namespace llvm
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