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author | Bob Wilson <bob.wilson@apple.com> | 2009-09-28 14:30:20 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2009-09-28 14:30:20 +0000 |
commit | 2dd957fff6c5cd1973062de7eeb66c4b29f340ab (patch) | |
tree | 9331f03a88e58af8d2345be1d3fb2524e3ac0881 /llvm/lib/Target/ARM/ARM.h | |
parent | 83e0d481ae93e13b71fb6592618efa57b6a3f93d (diff) | |
download | bcm5719-llvm-2dd957fff6c5cd1973062de7eeb66c4b29f340ab.tar.gz bcm5719-llvm-2dd957fff6c5cd1973062de7eeb66c4b29f340ab.zip |
Pass the optimization level when constructing the ARM instruction selector.
Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel. Radar 7250345.
llvm-svn: 82988
Diffstat (limited to 'llvm/lib/Target/ARM/ARM.h')
-rw-r--r-- | llvm/lib/Target/ARM/ARM.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h index e95dfc02b60..487ce1dd434 100644 --- a/llvm/lib/Target/ARM/ARM.h +++ b/llvm/lib/Target/ARM/ARM.h @@ -92,7 +92,8 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) { } } -FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM); +FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, + CodeGenOpt::Level OptLevel); FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, MachineCodeEmitter &MCE); |