Rename DEBUG macro to LLVM_DEBUG.

    
The DEBUG() macro is very generic so it might clash with other projects.
The renaming was done as follows:
- git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g'
- git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM
- Manual change to APInt
- Manually chage DOCS as regex doesn't match it.

In the transition period the DEBUG() macro is still present and aliased
to the LLVM_DEBUG() one.

Differential Revision: https://reviews.llvm.org/D43624

llvm-svn: 332240

1 files changed, 13 insertions, 11 deletions

diff --git a/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp b/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
index 3280d5ee6cf..3fc5a033dd5 100644
--- a/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
+++ b/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
@@ -122,7 +122,7 @@ static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
                                              uint64_t Address,
                                              const void *Decoder) {
   if (RegNo >= 32) {
-    DEBUG(dbgs() << "Not a GPR32 register.");
+    LLVM_DEBUG(dbgs() << "Not a GPR32 register.");
     return MCDisassembler::Fail;
   }
 
@@ -222,7 +222,7 @@ static DecodeStatus DecodeStLImmInstruction(MCInst &Inst, uint64_t Insn,
   unsigned SrcC, DstB, LImm;
   DstB = decodeBField(Insn);
   if (DstB != 62) {
-    DEBUG(dbgs() << "Decoding StLImm found non-limm register.");
+    LLVM_DEBUG(dbgs() << "Decoding StLImm found non-limm register.");
     return MCDisassembler::Fail;
   }
   SrcC = decodeCField(Insn);
@@ -237,10 +237,10 @@ static DecodeStatus DecodeLdLImmInstruction(MCInst &Inst, uint64_t Insn,
                                             uint64_t Address,
                                             const void *Decoder) {
   unsigned DstA, SrcB, LImm;
-  DEBUG(dbgs() << "Decoding LdLImm:\n");
+  LLVM_DEBUG(dbgs() << "Decoding LdLImm:\n");
   SrcB = decodeBField(Insn);
   if (SrcB != 62) {
-    DEBUG(dbgs() << "Decoding LdLImm found non-limm register.");
+    LLVM_DEBUG(dbgs() << "Decoding LdLImm found non-limm register.");
     return MCDisassembler::Fail;
   }
   DstA = decodeAField(Insn);
@@ -255,13 +255,13 @@ static DecodeStatus DecodeLdRLImmInstruction(MCInst &Inst, uint64_t Insn,
                                              uint64_t Address,
                                              const void *Decoder) {
   unsigned DstA, SrcB;
-  DEBUG(dbgs() << "Decoding LdRLimm\n");
+  LLVM_DEBUG(dbgs() << "Decoding LdRLimm\n");
   DstA = decodeAField(Insn);
   DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder);
   SrcB = decodeBField(Insn);
   DecodeGPR32RegisterClass(Inst, SrcB, Address, Decoder);
   if (decodeCField(Insn) != 62) {
-    DEBUG(dbgs() << "Decoding LdRLimm found non-limm register.");
+    LLVM_DEBUG(dbgs() << "Decoding LdRLimm found non-limm register.");
     return MCDisassembler::Fail;
   }
   Inst.addOperand(MCOperand::createImm((uint32_t)(Insn >> 32)));
@@ -271,7 +271,7 @@ static DecodeStatus DecodeLdRLImmInstruction(MCInst &Inst, uint64_t Insn,
 static DecodeStatus DecodeMoveHRegInstruction(MCInst &Inst, uint64_t Insn,
                                               uint64_t Address,
                                               const void *Decoder) {
-  DEBUG(dbgs() << "Decoding MOV_S h-register\n");
+  LLVM_DEBUG(dbgs() << "Decoding MOV_S h-register\n");
   using Field = decltype(Insn);
   Field h = fieldFromInstruction(Insn, 5, 3) |
             (fieldFromInstruction(Insn, 0, 2) << 3);
@@ -322,10 +322,10 @@ DecodeStatus ARCDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
       Result =
           decodeInstruction(DecoderTable64, Instr, Insn64, Address, this, STI);
       if (Success == Result) {
-        DEBUG(dbgs() << "Successfully decoded 64-bit instruction.");
+        LLVM_DEBUG(dbgs() << "Successfully decoded 64-bit instruction.");
         return Result;
       }
-      DEBUG(dbgs() << "Not a 64-bit instruction, falling back to 32-bit.");
+      LLVM_DEBUG(dbgs() << "Not a 64-bit instruction, falling back to 32-bit.");
     }
     uint32_t Insn32;
     if (!readInstruction32(Bytes, Address, Size, Insn32)) {
@@ -342,10 +342,12 @@ DecodeStatus ARCDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
       Result =
           decodeInstruction(DecoderTable48, Instr, Insn48, Address, this, STI);
       if (Success == Result) {
-        DEBUG(dbgs() << "Successfully decoded 16-bit instruction with limm.");
+        LLVM_DEBUG(
+            dbgs() << "Successfully decoded 16-bit instruction with limm.");
         return Result;
       }
-      DEBUG(dbgs() << "Not a 16-bit instruction with limm, try without it.");
+      LLVM_DEBUG(
+          dbgs() << "Not a 16-bit instruction with limm, try without it.");
     }
 
     uint32_t Insn16;