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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-06-28 02:52:39 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-06-28 02:52:39 +0000 |
| commit | d445455643900416388b5819ebbdfc39329ab8cc (patch) | |
| tree | 8c2c87369ff90e34789b8db8390ad732a6fee292 /llvm/lib/Target/AMDGPU | |
| parent | eb40733bf07e523ff898cbad942c9dbbc5beaca2 (diff) | |
| download | bcm5719-llvm-d445455643900416388b5819ebbdfc39329ab8cc.tar.gz bcm5719-llvm-d445455643900416388b5819ebbdfc39329ab8cc.zip | |
[AMDGPU] Add pattern for v_alignbit_b32 with immediate
If immediate in shift is less than 32 we can use alignbit too.
Differential Revision: https://reviews.llvm.org/D34729
llvm-svn: 306500
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 5 |
2 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 3b4a8b5d1e8..4a81fb3b463 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -336,6 +336,10 @@ def NegSubInlineConst16 : ImmLeaf<i16, [{ return Imm < -16 && Imm >= -64; }], NegateImm>; +def ShiftAmt32Imm : PatLeaf <(imm), [{ + return N->getZExtValue() < 32; +}]>; + //===----------------------------------------------------------------------===// // Custom Operands //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 3eb8af108f2..bcc685015cf 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -933,10 +933,9 @@ def : Pat<(i32 (trunc (srl i64:$src0, (and i32:$src1, (i32 31))))), (V_ALIGNBIT_B32 (i32 (EXTRACT_SUBREG (i64 $src0), sub1)), (i32 (EXTRACT_SUBREG (i64 $src0), sub0)), $src1)>; -def : Pat<(i32 (trunc (shl i64:$src0, (and i32:$src1, (i32 31))))), +def : Pat<(i32 (trunc (srl i64:$src0, (i32 ShiftAmt32Imm:$src1)))), (V_ALIGNBIT_B32 (i32 (EXTRACT_SUBREG (i64 $src0), sub1)), - (i32 (EXTRACT_SUBREG (i64 $src0), sub0)), - (S_SUB_I32 (i32 32), $src1))>; + (i32 (EXTRACT_SUBREG (i64 $src0), sub0)), $src1)>; /********** ====================== **********/ /********** Indirect addressing **********/ |
