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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-20 16:01:09 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-20 16:01:09 +0000 |
| commit | b7f87c0ecfeba4b4358fd5ff0cad066845fd6e07 (patch) | |
| tree | a67610e374bea1acd1defa1beacf2a4287d4d0e2 /llvm/lib/Target/AMDGPU | |
| parent | fcce531752736a6c7c80def48c6abf12e2db7358 (diff) | |
| download | bcm5719-llvm-b7f87c0ecfeba4b4358fd5ff0cad066845fd6e07.tar.gz bcm5719-llvm-b7f87c0ecfeba4b4358fd5ff0cad066845fd6e07.zip | |
AMDGPU: Treat undef as an inline immediate
This should only matter in vectors with an undef component, since a
full undef vector would have been folded out.
llvm-svn: 363941
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 18 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 6 |
2 files changed, 19 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index 3c8538cb03e..57caff79f16 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -67,7 +67,22 @@ class R600InstrInfo; namespace { +static bool isNullConstantOrUndef(SDValue V) { + if (V.isUndef()) + return true; + + ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V); + return Const != nullptr && Const->isNullValue(); +} + static bool getConstantValue(SDValue N, uint32_t &Out) { + // This is only used for packed vectors, where ussing 0 for undef should + // always be good. + if (N.isUndef()) { + Out = 0; + return true; + } + if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(N)) { Out = C->getAPIntValue().getSExtValue(); return true; @@ -479,7 +494,8 @@ bool AMDGPUDAGToDAGISel::isNoNanSrc(SDValue N) const { bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N, bool Negated) const { - // TODO: Handle undef + if (N->isUndef()) + return true; const SIInstrInfo *TII = Subtarget->getInstrInfo(); if (Negated) { diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index ba9cd868643..c06356a685e 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -610,8 +610,6 @@ def getNegV2I16Imm : SDNodeXForm<build_vector, [{ return SDValue(packNegConstantV2I16(N, *CurDAG), 0); }]>; - -// TODO: Handle undef as 0 def NegSubInlineConstV216 : PatLeaf<(build_vector), [{ assert(N->getNumOperands() == 2); assert(N->getOperand(0).getValueType().getSizeInBits() == 16); @@ -620,8 +618,8 @@ def NegSubInlineConstV216 : PatLeaf<(build_vector), [{ if (Src0 == Src1) return isNegInlineImmediate(Src0.getNode()); - return (isNullConstant(Src0) && isNegInlineImmediate(Src1.getNode())) || - (isNullConstant(Src1) && isNegInlineImmediate(Src0.getNode())); + return (isNullConstantOrUndef(Src0) && isNegInlineImmediate(Src1.getNode())) || + (isNullConstantOrUndef(Src1) && isNegInlineImmediate(Src0.getNode())); }], getNegV2I16Imm>; //===----------------------------------------------------------------------===// |
