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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-03-29 12:09:25 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-03-29 12:09:25 +0000
commitb670ba4e870315d3d3c5889ab8dfafe054ab087e (patch)
tree8bc5036d944b769b109071b25254b89287d2da19 /llvm/lib/Target/AMDGPU
parentbe22cff6fd8661434f26f0b74bd76ab97c345c6b (diff)
downloadbcm5719-llvm-b670ba4e870315d3d3c5889ab8dfafe054ab087e.tar.gz
bcm5719-llvm-b670ba4e870315d3d3c5889ab8dfafe054ab087e.zip
[AMDGPU] Tidy up computeKnownBitsForTargetNode/ComputeNumSignBitsForTargetNode arguments. NFCI.
Based on comment in D31249. llvm-svn: 298991
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp19
1 files changed, 6 insertions, 13 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index af3c9ff28df..efb5052446b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -3555,13 +3555,11 @@ SDValue AMDGPUTargetLowering::getRecipEstimate(SDValue Operand,
}
void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
- const SDValue Op,
- APInt &KnownZero,
- APInt &KnownOne,
- const SelectionDAG &DAG,
- unsigned Depth) const {
+ const SDValue Op, APInt &KnownZero, APInt &KnownOne,
+ const SelectionDAG &DAG, unsigned Depth) const {
- KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); // Don't know anything.
+ unsigned BitWidth = KnownZero.getBitWidth();
+ KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
APInt KnownZero2;
APInt KnownOne2;
@@ -3582,17 +3580,14 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
if (!CWidth)
return;
- unsigned BitWidth = 32;
uint32_t Width = CWidth->getZExtValue() & 0x1f;
if (Opc == AMDGPUISD::BFE_U32)
- KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - Width);
+ KnownZero = APInt::getHighBitsSet(32, 32 - Width);
break;
}
case AMDGPUISD::FP_TO_FP16: {
- unsigned BitWidth = KnownZero.getBitWidth();
-
// High bits are zero.
KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 16);
break;
@@ -3601,9 +3596,7 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
}
unsigned AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(
- SDValue Op,
- const SelectionDAG &DAG,
- unsigned Depth) const {
+ SDValue Op, const SelectionDAG &DAG, unsigned Depth) const {
switch (Op.getOpcode()) {
case AMDGPUISD::BFE_I32: {
ConstantSDNode *Width = dyn_cast<ConstantSDNode>(Op.getOperand(2));
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