diff options
| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2017-05-26 20:38:26 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2017-05-26 20:38:26 +0000 |
| commit | b2ff8dfea0664584630cc940793992235d7d8537 (patch) | |
| tree | 2f5fad7d7dcb8131c35d9140ce63a9ba7dfb863a /llvm/lib/Target/AMDGPU | |
| parent | 5097a1184b8c09a00972c7783d87efab5faec3d3 (diff) | |
| download | bcm5719-llvm-b2ff8dfea0664584630cc940793992235d7d8537.tar.gz bcm5719-llvm-b2ff8dfea0664584630cc940793992235d7d8537.zip | |
Resubmit r303859 with test fixed.
[AMDGPU] add intrinsic for s_getpc
Summary: The s_getpc instruction is exposed as intrinsic llvm.amdgcn.s.getpc.
Patch by Tim Corringham
llvm-svn: 304031
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SOPInstructions.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index f2d8b6f7b7a..ec29a66c8bb 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -184,7 +184,9 @@ def S_BITSET0_B32 : SOP1_32 <"s_bitset0_b32">; def S_BITSET0_B64 : SOP1_64_32 <"s_bitset0_b64">; def S_BITSET1_B32 : SOP1_32 <"s_bitset1_b32">; def S_BITSET1_B64 : SOP1_64_32 <"s_bitset1_b64">; -def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64">; +def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64", + [(set i64:$sdst, (int_amdgcn_s_getpc))] +>; let isTerminator = 1, isBarrier = 1, SchedRW = [WriteBranch] in { |
