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| author | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2016-03-11 14:53:28 +0000 |
|---|---|---|
| committer | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2016-03-11 14:53:28 +0000 |
| commit | a7f480b4e998fb7c494292074964681b6ab1175b (patch) | |
| tree | 7d68d8abe3846e49a268769bc8baf6a84ad20857 /llvm/lib/Target/AMDGPU | |
| parent | 03f306c7c5129b5d936e970294c73753f0b37da8 (diff) | |
| download | bcm5719-llvm-a7f480b4e998fb7c494292074964681b6ab1175b.tar.gz bcm5719-llvm-a7f480b4e998fb7c494292074964681b6ab1175b.zip | |
[AMDGPU] Fix VOPC instruction operand namings
Differential Revision: http://reviews.llvm.org/D17966
llvm-svn: 263242
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrFormats.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td index f292dc9d031..6a0bbef0741 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td +++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td @@ -445,10 +445,10 @@ class VOP3be <bits<9> op> : Enc64 { class VOPCe <bits<8> op> : Enc32 { bits<9> src0; - bits<8> vsrc1; + bits<8> src1; let Inst{8-0} = src0; - let Inst{16-9} = vsrc1; + let Inst{16-9} = src1; let Inst{24-17} = op; let Inst{31-25} = 0x3e; } |
