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authorMatthias Braun <matze@braunis.de>2015-07-14 17:52:07 +0000
committerMatthias Braun <matze@braunis.de>2015-07-14 17:52:07 +0000
commit9912bb817cef9d1829acb4baec4a27b7eaf5b610 (patch)
treefd24e6d6cd0c74144197fefd9b612624eafa5043 /llvm/lib/Target/AMDGPU
parent092c475e250af64e7b9ba459067d43cb71fb6dfd (diff)
downloadbcm5719-llvm-9912bb817cef9d1829acb4baec4a27b7eaf5b610.tar.gz
bcm5719-llvm-9912bb817cef9d1829acb4baec4a27b7eaf5b610.zip
MachineRegisterInfo: Remove UsedPhysReg infrastructure
We have a detailed def/use lists for every physical register in MachineRegisterInfo anyway, so there is little use in maintaining an additional bitset of which ones are used. Removing it frees us from extra book keeping. This simplifies VirtRegMap. Differential Revision: http://reviews.llvm.org/D10911 llvm-svn: 242173
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp1
-rw-r--r--llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp1
-rw-r--r--llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp2
3 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 587ea63d679..d23b92edef3 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -53,7 +53,6 @@ SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg(
if (!LaneVGPRs.count(LaneVGPRIdx)) {
unsigned LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass);
LaneVGPRs[LaneVGPRIdx] = LaneVGPR;
- MRI.setPhysRegUsed(LaneVGPR);
// Add this register as live-in to all blocks to avoid machine verifer
// complaining about use of an undefined physical register.
diff --git a/llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp b/llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
index 0a7f684552f..b086d2ed665 100644
--- a/llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
@@ -91,7 +91,6 @@ bool SIPrepareScratchRegs::runOnMachineFunction(MachineFunction &MF) {
if (ScratchOffsetReg != AMDGPU::NoRegister) {
// Found an SGPR to use
- MRI.setPhysRegUsed(ScratchOffsetReg);
BuildMI(*Entry, I, DL, TII->get(AMDGPU::S_MOV_B32), ScratchOffsetReg)
.addReg(ScratchOffsetPreloadReg);
} else {
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index db2ff0b1f95..ce4acafac9f 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -499,7 +499,7 @@ unsigned SIRegisterInfo::findUnusedRegister(const MachineRegisterInfo &MRI,
for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
I != E; ++I) {
- if (!MRI.isPhysRegUsed(*I))
+ if (MRI.reg_nodbg_empty(*I))
return *I;
}
return AMDGPU::NoRegister;
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