diff options
| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-05-26 18:01:29 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-05-26 18:01:29 +0000 |
| commit | 6a2431df0b4e448c06836217cbd53103ccb903a5 (patch) | |
| tree | 4505850299d3e87baaf4009add82c66013628d70 /llvm/lib/Target/AMDGPU | |
| parent | 43e76cd489250329cddb1fd575cf9fc9c17ea334 (diff) | |
| download | bcm5719-llvm-6a2431df0b4e448c06836217cbd53103ccb903a5.tar.gz bcm5719-llvm-6a2431df0b4e448c06836217cbd53103ccb903a5.zip | |
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
See bug 33171: https://bugs.llvm.org/show_bug.cgi?id=33171
Reviewers: Sam Kolton
Differential Revision: https://reviews.llvm.org/D33553
llvm-svn: 304015
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 4b2c3fa9b56..e02acf516c0 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -340,7 +340,7 @@ SIMCCodeEmitter::getSDWA9SrcEncoding(const MCInst &MI, unsigned OpNo, unsigned Reg = MO.getReg(); RegEnc |= MRI.getEncodingValue(Reg); RegEnc &= SDWA9EncValues::SRC_VGPR_MASK; - if (AMDGPU::isSGPR(Reg, &MRI)) { + if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) { RegEnc |= SDWA9EncValues::SRC_SGPR_MASK; } return RegEnc; |
