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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-11 22:35:22 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-11 22:35:22 +0000 |
| commit | 682eb4396aee687820effdcb118d627400390612 (patch) | |
| tree | 063bdd5f14a245d2dfb4b2568cf3f381898bf0b4 /llvm/lib/Target/AMDGPU | |
| parent | 28bd4cbeaf0093b90b1f38d2675bb0db999cac46 (diff) | |
| download | bcm5719-llvm-682eb4396aee687820effdcb118d627400390612.tar.gz bcm5719-llvm-682eb4396aee687820effdcb118d627400390612.zip | |
AMDGPU: Fix sext_inreg for i1 in i16
This produces worse code when i16 is legal, mostly
due to combines getting confused by conversions inserted
for uniform 16-bit operations.
llvm-svn: 291717
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index bc35c2edc8d..b86c0419118 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -871,6 +871,11 @@ def : Pat < >; def : Pat < + (i16 (sext_inreg i16:$src, i1)), + (S_BFE_I32 $src, (i32 0x00010000)) // 0 | 1 << 16 +>; + +def : Pat < (i16 (sext_inreg i16:$src, i8)), (S_BFE_I32 $src, (i32 0x80000)) // 0 | 8 << 16 >; |
