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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-02-13 02:09:49 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-02-13 02:09:49 +0000 |
| commit | 4409051d00a6b053354c93e28880c24aa00d598c (patch) | |
| tree | ac8e4f0a30ac241a1fc8e30c687c974bcc77a401 /llvm/lib/Target/AMDGPU | |
| parent | 7c7c3e35911f7f7c1709cac05b1d27ce19db5ab5 (diff) | |
| download | bcm5719-llvm-4409051d00a6b053354c93e28880c24aa00d598c.tar.gz bcm5719-llvm-4409051d00a6b053354c93e28880c24aa00d598c.zip | |
AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic
This intrinsic will be used to expose dpp functionality to higher-level
languages. It will map to the dpp version of v_mov_b32.
llvm-svn: 260792
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VIInstructions.td | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/VIInstructions.td b/llvm/lib/Target/AMDGPU/VIInstructions.td index 1a7801c92bd..89f0a14ff84 100644 --- a/llvm/lib/Target/AMDGPU/VIInstructions.td +++ b/llvm/lib/Target/AMDGPU/VIInstructions.td @@ -109,4 +109,15 @@ def : Pat < (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset)) >; +//===----------------------------------------------------------------------===// +// DPP Paterns +//===----------------------------------------------------------------------===// + +def : Pat < + (int_amdgcn_mov_dpp i32:$src, imm:$dpp_ctrl, imm:$bound_ctrl, + imm:$bank_mask, imm:$row_mask), + (V_MOV_B32_dpp $src, (as_i32imm $dpp_ctrl), (as_i1imm $bound_ctrl), + (as_i32imm $bank_mask), (as_i32imm $row_mask)) +>; + } // End Predicates = [isVI] |
