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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-07 21:11:56 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-07 21:56:16 -0500 |
| commit | 22700f68e171aeb1182ecbe9e3e8fc10d8633e24 (patch) | |
| tree | 821ac74b9c72762fc0eeb720520e2882f0c1071e /llvm/lib/Target/AMDGPU | |
| parent | dd495e8a877784df413679e5ec380985b60c0b2c (diff) | |
| download | bcm5719-llvm-22700f68e171aeb1182ecbe9e3e8fc10d8633e24.tar.gz bcm5719-llvm-22700f68e171aeb1182ecbe9e3e8fc10d8633e24.zip | |
AMDGPU: Annotate EXTRACT_SUBREGs with source register classes
This partially fixes GlobalISel import of the patterns, but removes a
lot of entriess from the end of the skipped pattern log.
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td index 27316f4c3ea..89e52d63af2 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td @@ -694,12 +694,12 @@ multiclass BFIPatterns <Instruction BFI_INT, def : AMDGPUPat < (or (and i64:$y, i64:$x), (and i64:$z, (not i64:$x))), (REG_SEQUENCE RC64, - (BFI_INT (i32 (EXTRACT_SUBREG $x, sub0)), - (i32 (EXTRACT_SUBREG $y, sub0)), - (i32 (EXTRACT_SUBREG $z, sub0))), sub0, - (BFI_INT (i32 (EXTRACT_SUBREG $x, sub1)), - (i32 (EXTRACT_SUBREG $y, sub1)), - (i32 (EXTRACT_SUBREG $z, sub1))), sub1) + (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub0)), + (i32 (EXTRACT_SUBREG RC64:$y, sub0)), + (i32 (EXTRACT_SUBREG RC64:$z, sub0))), sub0, + (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub1)), + (i32 (EXTRACT_SUBREG RC64:$y, sub1)), + (i32 (EXTRACT_SUBREG RC64:$z, sub1))), sub1) >; // SHA-256 Ch function @@ -713,12 +713,12 @@ multiclass BFIPatterns <Instruction BFI_INT, def : AMDGPUPat < (xor i64:$z, (and i64:$x, (xor i64:$y, i64:$z))), (REG_SEQUENCE RC64, - (BFI_INT (i32 (EXTRACT_SUBREG $x, sub0)), - (i32 (EXTRACT_SUBREG $y, sub0)), - (i32 (EXTRACT_SUBREG $z, sub0))), sub0, - (BFI_INT (i32 (EXTRACT_SUBREG $x, sub1)), - (i32 (EXTRACT_SUBREG $y, sub1)), - (i32 (EXTRACT_SUBREG $z, sub1))), sub1) + (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub0)), + (i32 (EXTRACT_SUBREG RC64:$y, sub0)), + (i32 (EXTRACT_SUBREG RC64:$z, sub0))), sub0, + (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub1)), + (i32 (EXTRACT_SUBREG RC64:$y, sub1)), + (i32 (EXTRACT_SUBREG RC64:$z, sub1))), sub1) >; def : AMDGPUPat < @@ -729,7 +729,7 @@ multiclass BFIPatterns <Instruction BFI_INT, def : AMDGPUPat < (f32 (fcopysign f32:$src0, f64:$src1)), (BFI_INT (LoadImm32 (i32 0x7fffffff)), $src0, - (i32 (EXTRACT_SUBREG $src1, sub1))) + (i32 (EXTRACT_SUBREG RC64:$src1, sub1))) >; def : AMDGPUPat < @@ -737,8 +737,8 @@ multiclass BFIPatterns <Instruction BFI_INT, (REG_SEQUENCE RC64, (i32 (EXTRACT_SUBREG $src0, sub0)), sub0, (BFI_INT (LoadImm32 (i32 0x7fffffff)), - (i32 (EXTRACT_SUBREG $src0, sub1)), - (i32 (EXTRACT_SUBREG $src1, sub1))), sub1) + (i32 (EXTRACT_SUBREG RC64:$src0, sub1)), + (i32 (EXTRACT_SUBREG RC64:$src1, sub1))), sub1) >; def : AMDGPUPat < @@ -746,7 +746,7 @@ multiclass BFIPatterns <Instruction BFI_INT, (REG_SEQUENCE RC64, (i32 (EXTRACT_SUBREG $src0, sub0)), sub0, (BFI_INT (LoadImm32 (i32 0x7fffffff)), - (i32 (EXTRACT_SUBREG $src0, sub1)), + (i32 (EXTRACT_SUBREG RC64:$src0, sub1)), $src1), sub1) >; } @@ -763,14 +763,14 @@ multiclass SHA256MaPattern <Instruction BFI_INT, Instruction XOR, RegisterClass def : AMDGPUPat < (or (and i64:$x, i64:$z), (and i64:$y, (or i64:$x, i64:$z))), (REG_SEQUENCE RC64, - (BFI_INT (XOR (i32 (EXTRACT_SUBREG $x, sub0)), - (i32 (EXTRACT_SUBREG $y, sub0))), - (i32 (EXTRACT_SUBREG $z, sub0)), - (i32 (EXTRACT_SUBREG $y, sub0))), sub0, - (BFI_INT (XOR (i32 (EXTRACT_SUBREG $x, sub1)), - (i32 (EXTRACT_SUBREG $y, sub1))), - (i32 (EXTRACT_SUBREG $z, sub1)), - (i32 (EXTRACT_SUBREG $y, sub1))), sub1) + (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub0)), + (i32 (EXTRACT_SUBREG RC64:$y, sub0))), + (i32 (EXTRACT_SUBREG RC64:$z, sub0)), + (i32 (EXTRACT_SUBREG RC64:$y, sub0))), sub0, + (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub1)), + (i32 (EXTRACT_SUBREG RC64:$y, sub1))), + (i32 (EXTRACT_SUBREG RC64:$z, sub1)), + (i32 (EXTRACT_SUBREG RC64:$y, sub1))), sub1) >; } |
