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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-25 19:01:51 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-25 19:01:51 +0000 |
| commit | 2c97ff07bfd94971f6480a686f06292059538632 (patch) | |
| tree | 211da70d788420f611394721a8002d140ab7652b /llvm/lib/Target/AMDGPU/VOP3Instructions.td | |
| parent | 956b0be72e327261d2dd54c8ecfb4e13a2745639 (diff) | |
| download | bcm5719-llvm-2c97ff07bfd94971f6480a686f06292059538632.tar.gz bcm5719-llvm-2c97ff07bfd94971f6480a686f06292059538632.zip | |
[AMDGPU] gfx1010 VOP1 instructions
Differential Revision: https://reviews.llvm.org/D61099
llvm-svn: 359225
Diffstat (limited to 'llvm/lib/Target/AMDGPU/VOP3Instructions.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3Instructions.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index acae4a32f84..124cfd238fd 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -671,12 +671,12 @@ let AssemblerPredicates = [isGFX6GFX7], DecoderNamespace = "GFX6GFX7" in { multiclass VOP3_Real_si<bits<9> op> { def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, - VOP3e_si <op, !cast<VOP3_Pseudo>(NAME).Pfl>; + VOP3e_gfx6_gfx7 <op, !cast<VOP3_Pseudo>(NAME).Pfl>; } multiclass VOP3be_Real_si<bits<9> op> { def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, - VOP3be_si <op, !cast<VOP3_Pseudo>(NAME).Pfl>; + VOP3be_gfx6_gfx7 <op, !cast<VOP3_Pseudo>(NAME).Pfl>; } } // End AssemblerPredicates = [isGFX6GFX7], DecoderNamespace = "GFX6GFX7" @@ -740,7 +740,7 @@ defm V_TRIG_PREOP_F64 : VOP3_Real_si <0x174>; multiclass VOP3_Real_ci<bits<9> op> { def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, - VOP3e_si <op, !cast<VOP3_Pseudo>(NAME).Pfl> { + VOP3e_gfx6_gfx7 <op, !cast<VOP3_Pseudo>(NAME).Pfl> { let AssemblerPredicates = [isGFX7Only]; let DecoderNamespace = "GFX7"; } @@ -748,7 +748,7 @@ multiclass VOP3_Real_ci<bits<9> op> { multiclass VOP3be_Real_ci<bits<9> op> { def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, - VOP3be_si <op, !cast<VOP3_Pseudo>(NAME).Pfl> { + VOP3be_gfx6_gfx7 <op, !cast<VOP3_Pseudo>(NAME).Pfl> { let AssemblerPredicates = [isGFX7Only]; let DecoderNamespace = "GFX7"; } |
