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author | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-04-04 10:57:58 +0000 |
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committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-04-04 10:57:58 +0000 |
commit | 3ffd383a15349392247302866777425096aedcf2 (patch) | |
tree | c68b934ab2f57bc13a3f3a59540191ddfc129d91 /llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h | |
parent | 21d9b33d62772c58267cc0aa725e35ac9a4661db (diff) | |
download | bcm5719-llvm-3ffd383a15349392247302866777425096aedcf2.tar.gz bcm5719-llvm-3ffd383a15349392247302866777425096aedcf2.zip |
AMDGPU: Fix copying i1 value out of loop with non-uniform exit
Summary:
When an i1-value is defined inside of a loop and used outside of it, we
cannot simply use the SGPR bitmask from the loop's last iteration.
There are also useful and correct cases of an i1-value being copied between
basic blocks, e.g. when a condition is computed outside of a loop and used
inside it. The concept of dominators is not sufficient to capture what is
going on, so I propose the notion of "lane-dominators".
Fixes a bug encountered in Nier: Automata.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103743
Change-Id: If37b969ddc71d823ab3004aeafb9ea050e45bd9a
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D40547
llvm-svn: 329164
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h')
-rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h new file mode 100644 index 00000000000..4f33a89a364 --- /dev/null +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h @@ -0,0 +1,24 @@ +//===- AMDGPULaneDominator.h ------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H +#define LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H + +namespace llvm { + +class MachineBasicBlock; + +namespace AMDGPU { + +bool laneDominates(MachineBasicBlock *MBBA, MachineBasicBlock *MBBB); + +} // end namespace AMDGPU +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H |