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| author | Sam Kolton <Sam.Kolton@amd.com> | 2017-05-23 10:08:55 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2017-05-23 10:08:55 +0000 |
| commit | f7659d71eb802e2539be6d4302e8034fdc43d65e (patch) | |
| tree | 83c31aea5a75e7b28e784f75e484c7eee1c9165b /llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | |
| parent | 657188ab0052b1d60d1f6659ec0e3ca2bb87bdb4 (diff) | |
| download | bcm5719-llvm-f7659d71eb802e2539be6d4302e8034fdc43d65e.tar.gz bcm5719-llvm-f7659d71eb802e2539be6d4302e8034fdc43d65e.zip | |
[AMDGPU] SDWA: Add assembler support for GFX9
Summary:
Added separate pseudo and real instruction for GFX9 SDWA instructions.
Currently supports only in assembler.
Depends D32493
Reviewers: vpykhtin, artem.tamazov
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D33132
llvm-svn: 303620
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 2abd4afad3b..630f469eabf 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -544,6 +544,17 @@ bool isVI(const MCSubtargetInfo &STI) { return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; } +bool isGFX9(const MCSubtargetInfo &STI) { + return STI.getFeatureBits()[AMDGPU::FeatureGFX9]; +} + +bool isSGPR(unsigned Reg, const MCRegisterInfo* TRI) { + const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID); + const unsigned FirstSubReg = TRI->getSubReg(Reg, 1); + return SGPRClass.contains(FirstSubReg != 0 ? FirstSubReg : Reg) || + Reg == AMDGPU::SCC; +} + unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI) { switch(Reg) { |
