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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-02-24 01:32:32 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-02-24 01:32:32 +0000 |
| commit | fa48c496e2ccde292b74b5dc45aa29c65e3748be (patch) | |
| tree | 821f35f9135999480b15bcfb994d1aaf021c9369 /llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | |
| parent | c22867f5fc960970d413a15cfe47a2e7379c6e29 (diff) | |
| download | bcm5719-llvm-fa48c496e2ccde292b74b5dc45aa29c65e3748be.tar.gz bcm5719-llvm-fa48c496e2ccde292b74b5dc45aa29c65e3748be.zip | |
[AMDGPU] Shrinking V_SUBBREV_U32
V_SUBBREV_U32 is a commute opcode for V_SUBB_U32. However, when
we try to commute V_SUBB_U32 in order to shrink it we do not then
process V_SUBBREV_U32 and it stay VOP3. This is fixed.
Differential Revision: https://reviews.llvm.org/D43699
llvm-svn: 326011
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 41f989ad322..994658dd3f8 100644 --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp @@ -92,7 +92,8 @@ static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII, case AMDGPU::V_ADDC_U32_e64: case AMDGPU::V_SUBB_U32_e64: - if (TII->getNamedOperand(MI, AMDGPU::OpName::src1)->isImm()) + case AMDGPU::V_SUBBREV_U32_e64: + if (!isVGPR(TII->getNamedOperand(MI, AMDGPU::OpName::src1), TRI, MRI)) return false; // Additional verification is needed for sdst/src2. return true; |
