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author | Tom Stellard <thomas.stellard@amd.com> | 2016-02-16 18:14:56 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2016-02-16 18:14:56 +0000 |
commit | cc4c8718ed09b783a03f93500b96aea41f8273b4 (patch) | |
tree | b94e70f32e84881ebfa9a42d2e655477f53e7a63 /llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | |
parent | 845435c86ac9fdc92093b7f1459589324b73d41f (diff) | |
download | bcm5719-llvm-cc4c8718ed09b783a03f93500b96aea41f8273b4.tar.gz bcm5719-llvm-cc4c8718ed09b783a03f93500b96aea41f8273b4.zip |
[AMDGPU] Rename $dst operand to $vdst for VOP instructions.
Summary: This change renames output operand for VOP instructions from dst to vdst. This is needed to enable decoding named operands for disassembler.
Reviewers: vpykhtin, tstellarAMD, arsenm
Subscribers: arsenm, llvm-commits, nhaustov
Projects: #llvm-amdgpu-spb
Differential Revision: http://reviews.llvm.org/D16920
llvm-svn: 260986
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 4f0913fe62f..c8cac805abf 100644 --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp @@ -287,9 +287,9 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) { MachineInstrBuilder Inst32 = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(Op32)); - // Add the dst operand if the 32-bit encoding also has an explicit $dst. + // Add the dst operand if the 32-bit encoding also has an explicit $vdst. // For VOPC instructions, this is replaced by an implicit def of vcc. - int Op32DstIdx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName::dst); + int Op32DstIdx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName::vdst); if (Op32DstIdx != -1) { // dst Inst32.addOperand(MI.getOperand(0)); |