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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-07-06 20:56:59 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-07-06 20:56:59 +0000
commita81198d82de20e14efce44826e302785bfda093a (patch)
treee81c154788fd7aa06f0c6510336a97fc1cb6ae01 /llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
parent60b91e0ba29e93c91715e367c767f9e223c28aca (diff)
downloadbcm5719-llvm-a81198d82de20e14efce44826e302785bfda093a.tar.gz
bcm5719-llvm-a81198d82de20e14efce44826e302785bfda093a.zip
AMDGPU: Minor cleanup of shrinking logic
llvm-svn: 307312
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp12
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 96a18544f02..6bff2c5fb79 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -110,10 +110,8 @@ static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII,
}
const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
- const MachineOperand *Src1Mod =
- TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
-
- if (Src1 && (!isVGPR(Src1, TRI, MRI) || (Src1Mod && Src1Mod->getImm() != 0)))
+ if (Src1 && (!isVGPR(Src1, TRI, MRI) ||
+ TII->hasModifiersSet(MI, AMDGPU::OpName::src1_modifiers)))
return false;
// We don't need to check src0, all input types are legal, so just make sure
@@ -122,10 +120,8 @@ static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII,
return false;
// Check output modifiers
- if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod))
- return false;
-
- return !TII->hasModifiersSet(MI, AMDGPU::OpName::clamp);
+ return !TII->hasModifiersSet(MI, AMDGPU::OpName::omod) &&
+ !TII->hasModifiersSet(MI, AMDGPU::OpName::clamp);
}
/// \brief This function checks \p MI for operands defined by a move immediate
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