AMDGPU/NFC: Reorder functions in SIMemoryLegalizer:

  - Move *load* functions before *atomic* functions
  - Move *store* functions before *atomic* functions

llvm-svn: 311256

1 files changed, 52 insertions, 52 deletions

diff --git a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
index 95c4c31e5a4..1b5d6eea595 100644
--- a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
@@ -108,14 +108,14 @@ private:
   /// context.
   void reportUnknownSynchScope(const MachineBasicBlock::iterator &MI);
 
-  /// \returns Atomic fence info if \p MI is an atomic fence operation,
-  /// "None" otherwise.
-  Optional<MemOpInfo> getAtomicFenceInfo(
-      const MachineBasicBlock::iterator &MI) const;
   /// \returns Load info if \p MI is a load operation, "None" otherwise.
   Optional<MemOpInfo> getLoadInfo(const MachineBasicBlock::iterator &MI) const;
   /// \returns Store info if \p MI is a store operation, "None" otherwise.
   Optional<MemOpInfo> getStoreInfo(const MachineBasicBlock::iterator &MI) const;
+  /// \returns Atomic fence info if \p MI is an atomic fence operation,
+  /// "None" otherwise.
+  Optional<MemOpInfo> getAtomicFenceInfo(
+      const MachineBasicBlock::iterator &MI) const;
   /// \returns Atomic cmpxchg info if \p MI is an atomic cmpxchg operation,
   /// "None" otherwise.
   Optional<MemOpInfo> getAtomicCmpxchgInfo(
@@ -125,16 +125,16 @@ private:
   Optional<MemOpInfo> getAtomicRmwInfo(
       const MachineBasicBlock::iterator &MI) const;
 
-  /// \brief Expands atomic fence operation \p MI. Returns true if
-  /// instructions are added/deleted or \p MI is modified, false otherwise.
-  bool expandAtomicFence(const MemOpInfo &MOI,
-                         MachineBasicBlock::iterator &MI);
   /// \brief Expands load operation \p MI. Returns true if instructions are
   /// added/deleted or \p MI is modified, false otherwise.
   bool expandLoad(const MemOpInfo &MOI, MachineBasicBlock::iterator &MI);
   /// \brief Expands store operation \p MI. Returns true if instructions are
   /// added/deleted or \p MI is modified, false otherwise.
   bool expandStore(const MemOpInfo &MOI, MachineBasicBlock::iterator &MI);
+  /// \brief Expands atomic fence operation \p MI. Returns true if
+  /// instructions are added/deleted or \p MI is modified, false otherwise.
+  bool expandAtomicFence(const MemOpInfo &MOI,
+                         MachineBasicBlock::iterator &MI);
   /// \brief Expands atomic cmpxchg operation \p MI. Returns true if
   /// instructions are added/deleted or \p MI is modified, false otherwise.
   bool expandAtomicCmpxchg(const MemOpInfo &MOI,
@@ -226,20 +226,6 @@ void SIMemoryLegalizer::reportUnknownSynchScope(
   CTX->diagnose(Diag);
 }
 
-Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getAtomicFenceInfo(
-    const MachineBasicBlock::iterator &MI) const {
-  assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
-
-  if (MI->getOpcode() != AMDGPU::ATOMIC_FENCE)
-    return None;
-
-  SyncScope::ID SSID =
-      static_cast<SyncScope::ID>(MI->getOperand(1).getImm());
-  AtomicOrdering Ordering =
-      static_cast<AtomicOrdering>(MI->getOperand(0).getImm());
-  return MemOpInfo(SSID, Ordering, AtomicOrdering::NotAtomic);
-}
-
 Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getLoadInfo(
     const MachineBasicBlock::iterator &MI) const {
   assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
@@ -272,6 +258,20 @@ Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getStoreInfo(
   return MemOpInfo(MMO);
 }
 
+Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getAtomicFenceInfo(
+    const MachineBasicBlock::iterator &MI) const {
+  assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
+
+  if (MI->getOpcode() != AMDGPU::ATOMIC_FENCE)
+    return None;
+
+  SyncScope::ID SSID =
+      static_cast<SyncScope::ID>(MI->getOperand(1).getImm());
+  AtomicOrdering Ordering =
+      static_cast<AtomicOrdering>(MI->getOperand(0).getImm());
+  return MemOpInfo(SSID, Ordering, AtomicOrdering::NotAtomic);
+}
+
 Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getAtomicCmpxchgInfo(
     const MachineBasicBlock::iterator &MI) const {
   assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
@@ -308,30 +308,30 @@ Optional<SIMemoryLegalizer::MemOpInfo> SIMemoryLegalizer::getAtomicRmwInfo(
   return MemOpInfo(MMO);
 }
 
-bool SIMemoryLegalizer::expandAtomicFence(const MemOpInfo &MOI,
-                                          MachineBasicBlock::iterator &MI) {
-  assert(MI->getOpcode() == AMDGPU::ATOMIC_FENCE);
+bool SIMemoryLegalizer::expandLoad(const MemOpInfo &MOI,
+                                   MachineBasicBlock::iterator &MI) {
+  assert(MI->mayLoad() && !MI->mayStore());
 
   bool Changed = false;
   if (MOI.SSID == SyncScope::System ||
       MOI.SSID == MMI->getAgentSSID()) {
     if (MOI.Ordering == AtomicOrdering::Acquire ||
-        MOI.Ordering == AtomicOrdering::Release ||
-        MOI.Ordering == AtomicOrdering::AcquireRelease ||
         MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
+      Changed |= setGLC(MI);
+
+    if (MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
       Changed |= insertWaitcntVmcnt0(MI);
 
     if (MOI.Ordering == AtomicOrdering::Acquire ||
-        MOI.Ordering == AtomicOrdering::AcquireRelease ||
-        MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
-      Changed |= insertBufferWbinvl1Vol(MI);
+        MOI.Ordering == AtomicOrdering::SequentiallyConsistent) {
+      Changed |= insertWaitcntVmcnt0(MI, false);
+      Changed |= insertBufferWbinvl1Vol(MI, false);
+    }
 
-    AtomicPseudoMIs.push_back(MI);
     return Changed;
   } else if (MOI.SSID == SyncScope::SingleThread ||
              MOI.SSID == MMI->getWorkgroupSSID() ||
              MOI.SSID == MMI->getWavefrontSSID()) {
-    AtomicPseudoMIs.push_back(MI);
     return Changed;
   } else {
     reportUnknownSynchScope(MI);
@@ -339,26 +339,17 @@ bool SIMemoryLegalizer::expandAtomicFence(const MemOpInfo &MOI,
   }
 }
 
-bool SIMemoryLegalizer::expandLoad(const MemOpInfo &MOI,
-                                   MachineBasicBlock::iterator &MI) {
-  assert(MI->mayLoad() && !MI->mayStore());
+bool SIMemoryLegalizer::expandStore(const MemOpInfo &MOI,
+                                    MachineBasicBlock::iterator &MI) {
+  assert(!MI->mayLoad() && MI->mayStore());
 
   bool Changed = false;
   if (MOI.SSID == SyncScope::System ||
       MOI.SSID == MMI->getAgentSSID()) {
-    if (MOI.Ordering == AtomicOrdering::Acquire ||
+    if (MOI.Ordering == AtomicOrdering::Release ||
         MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
-      Changed |= setGLC(MI);
-
-    if (MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
       Changed |= insertWaitcntVmcnt0(MI);
 
-    if (MOI.Ordering == AtomicOrdering::Acquire ||
-        MOI.Ordering == AtomicOrdering::SequentiallyConsistent) {
-      Changed |= insertWaitcntVmcnt0(MI, false);
-      Changed |= insertBufferWbinvl1Vol(MI, false);
-    }
-
     return Changed;
   } else if (MOI.SSID == SyncScope::SingleThread ||
              MOI.SSID == MMI->getWorkgroupSSID() ||
@@ -370,21 +361,30 @@ bool SIMemoryLegalizer::expandLoad(const MemOpInfo &MOI,
   }
 }
 
-bool SIMemoryLegalizer::expandStore(const MemOpInfo &MOI,
-                                    MachineBasicBlock::iterator &MI) {
-  assert(!MI->mayLoad() && MI->mayStore());
+bool SIMemoryLegalizer::expandAtomicFence(const MemOpInfo &MOI,
+                                          MachineBasicBlock::iterator &MI) {
+  assert(MI->getOpcode() == AMDGPU::ATOMIC_FENCE);
 
   bool Changed = false;
   if (MOI.SSID == SyncScope::System ||
       MOI.SSID == MMI->getAgentSSID()) {
-    if (MOI.Ordering == AtomicOrdering::Release ||
+    if (MOI.Ordering == AtomicOrdering::Acquire ||
+        MOI.Ordering == AtomicOrdering::Release ||
+        MOI.Ordering == AtomicOrdering::AcquireRelease ||
         MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
       Changed |= insertWaitcntVmcnt0(MI);
 
+    if (MOI.Ordering == AtomicOrdering::Acquire ||
+        MOI.Ordering == AtomicOrdering::AcquireRelease ||
+        MOI.Ordering == AtomicOrdering::SequentiallyConsistent)
+      Changed |= insertBufferWbinvl1Vol(MI);
+
+    AtomicPseudoMIs.push_back(MI);
     return Changed;
   } else if (MOI.SSID == SyncScope::SingleThread ||
              MOI.SSID == MMI->getWorkgroupSSID() ||
              MOI.SSID == MMI->getWavefrontSSID()) {
+    AtomicPseudoMIs.push_back(MI);
     return Changed;
   } else {
     reportUnknownSynchScope(MI);
@@ -476,12 +476,12 @@ bool SIMemoryLegalizer::runOnMachineFunction(MachineFunction &MF) {
       if (!(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic))
         continue;
 
-      if (const auto &MOI = getAtomicFenceInfo(MI))
-        Changed |= expandAtomicFence(MOI.getValue(), MI);
-      else if (const auto &MOI = getLoadInfo(MI))
+      if (const auto &MOI = getLoadInfo(MI))
         Changed |= expandLoad(MOI.getValue(), MI);
       else if (const auto &MOI = getStoreInfo(MI))
         Changed |= expandStore(MOI.getValue(), MI);
+      else if (const auto &MOI = getAtomicFenceInfo(MI))
+        Changed |= expandAtomicFence(MOI.getValue(), MI);
       else if (const auto &MOI = getAtomicCmpxchgInfo(MI))
         Changed |= expandAtomicCmpxchg(MOI.getValue(), MI);
       else if (const auto &MOI = getAtomicRmwInfo(MI))