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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-22 17:01:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-22 17:01:30 +0000 |
| commit | 8d718dcfdae7c4ce7fae4ed51ac8a931142dc89d (patch) | |
| tree | 15837044b6336d9e7cf1f7e10ac1874a83c73373 /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | |
| parent | f9245b75c013653a59ced45a1340e39d9a6bbcb9 (diff) | |
| download | bcm5719-llvm-8d718dcfdae7c4ce7fae4ed51ac8a931142dc89d.tar.gz bcm5719-llvm-8d718dcfdae7c4ce7fae4ed51ac8a931142dc89d.zip | |
AMDGPU: Add HSA dispatch id intrinsic
llvm-svn: 276437
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h index f5bd6366c71..2eec9bf518c 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h @@ -92,8 +92,8 @@ private: bool PrivateSegmentBuffer : 1; bool DispatchPtr : 1; bool QueuePtr : 1; - bool DispatchID : 1; bool KernargSegmentPtr : 1; + bool DispatchID : 1; bool FlatScratchInit : 1; bool GridWorkgroupCountX : 1; bool GridWorkgroupCountY : 1; @@ -143,6 +143,7 @@ public: unsigned addDispatchPtr(const SIRegisterInfo &TRI); unsigned addQueuePtr(const SIRegisterInfo &TRI); unsigned addKernargSegmentPtr(const SIRegisterInfo &TRI); + unsigned addDispatchID(const SIRegisterInfo &TRI); unsigned addFlatScratchInit(const SIRegisterInfo &TRI); // Add system SGPRs. @@ -192,14 +193,14 @@ public: return QueuePtr; } - bool hasDispatchID() const { - return DispatchID; - } - bool hasKernargSegmentPtr() const { return KernargSegmentPtr; } + bool hasDispatchID() const { + return DispatchID; + } + bool hasFlatScratchInit() const { return FlatScratchInit; } |
