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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-11 22:29:24 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-11 22:29:24 +0000 |
| commit | e622dc38038ebc17a4f00ffa6622ff3db5383ce0 (patch) | |
| tree | 2be7aab41ea012ded0e9710d59023a248bbd6f1d /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | fe78ffba92c01a1138e12746d3fc74dfd17e01a8 (diff) | |
| download | bcm5719-llvm-e622dc38038ebc17a4f00ffa6622ff3db5383ce0.tar.gz bcm5719-llvm-e622dc38038ebc17a4f00ffa6622ff3db5383ce0.zip | |
AMDGPU: Refactor argument lowering
Split into smaller functions and prepare for handling
non-entry functions.
llvm-svn: 299998
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index efae3382f49..debb42fc0fc 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -41,13 +41,13 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) WorkGroupInfoSystemSGPR(AMDGPU::NoRegister), PrivateSegmentWaveByteOffsetSystemSGPR(AMDGPU::NoRegister), PSInputAddr(0), + PSInputEnable(0), ReturnsVoid(true), FlatWorkGroupSizes(0, 0), WavesPerEU(0, 0), DebuggerWorkGroupIDStackObjectIndices({{0, 0, 0}}), DebuggerWorkItemIDStackObjectIndices({{0, 0, 0}}), LDSWaveSpillSize(0), - PSInputEna(0), NumUserSGPRs(0), NumSystemSGPRs(0), HasSpilledSGPRs(false), |
