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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-25 19:27:18 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-25 19:27:18 +0000 |
| commit | 48ab526f12eca74e3dcf752c9f98dae3e92f173b (patch) | |
| tree | 03ec0a3311d51ad76a6ee47400fba1735e024eb5 /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | 621d3675cbb422283e6e858d778d3c2abfd5b929 (diff) | |
| download | bcm5719-llvm-48ab526f12eca74e3dcf752c9f98dae3e92f173b.tar.gz bcm5719-llvm-48ab526f12eca74e3dcf752c9f98dae3e92f173b.zip | |
AMDGPU: Add queue ptr intrinsic
llvm-svn: 267451
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 43f4b9f7dde..d42c7c1e2ba 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -116,6 +116,9 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) if (F->hasFnAttribute("amdgpu-dispatch-ptr")) DispatchPtr = true; + + if (F->hasFnAttribute("amdgpu-queue-ptr")) + QueuePtr = true; } // We don't need to worry about accessing spills with flat instructions. |
