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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-12-20 15:52:17 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-12-20 15:52:17 +0000 |
| commit | 244891d1290f7387c996bdeec0fc5846576f3f42 (patch) | |
| tree | aa0246cc940218897f1480e474eb669bb1713a3d /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | f789f05ee2e39b5fee20b7dd1d0bd5141bbf662f (diff) | |
| download | bcm5719-llvm-244891d1290f7387c996bdeec0fc5846576f3f42.tar.gz bcm5719-llvm-244891d1290f7387c996bdeec0fc5846576f3f42.zip | |
AMDGPU/SI: Add a MachineMemOperand to MIMG instructions
Summary:
Without a MachineMemOperand, the scheduler was assuming MIMG instructions
were ordered memory references, so no loads or stores could be reordered
across them.
Reviewers: arsenm
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D27536
llvm-svn: 290179
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index e911817c451..8b511d4677b 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -52,6 +52,7 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) WavesPerEU(0, 0), DebuggerWorkGroupIDStackObjectIndices({{0, 0, 0}}), DebuggerWorkItemIDStackObjectIndices({{0, 0, 0}}), + ImagePSV(llvm::make_unique<AMDGPUImagePseudoSourceValue>()), LDSWaveSpillSize(0), PSInputEna(0), NumUserSGPRs(0), |
