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authorMichael Liao <michael.hliao@gmail.com>2019-07-05 20:23:59 +0000
committerMichael Liao <michael.hliao@gmail.com>2019-07-05 20:23:59 +0000
commit8d6ea2d48c87d9ada06c384de3e255a2f6706ac3 (patch)
treeef858aca72a281fe5a4cc1b2c756dab52de1bf73 /llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
parent009225374a410888a4c1ed28549a650c516550f0 (diff)
downloadbcm5719-llvm-8d6ea2d48c87d9ada06c384de3e255a2f6706ac3.tar.gz
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[CodeGen] Enhance `MachineInstrSpan` to allow the end of MBB to be used.
Summary: - Explicitly specify the parent MBB to allow the end iterator to be used. Reviewers: aprantl, MatzeB, craig.topper, qcolombet Subscribers: arsenm, jvesely, nhaehnle, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64261 llvm-svn: 365240
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
index 53a64678462..7838a59b633 100644
--- a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
@@ -92,7 +92,7 @@ static void insertCSRSaves(MachineBasicBlock &SaveBlock,
// Insert the spill to the stack frame.
unsigned Reg = CS.getReg();
- MachineInstrSpan MIS(I);
+ MachineInstrSpan MIS(I, &SaveBlock);
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.storeRegToStackSlot(SaveBlock, I, Reg, true, CS.getFrameIdx(), RC,
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