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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2016-11-15 19:00:15 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2016-11-15 19:00:15 +0000 |
| commit | ea91cca593bb543edce86c15c2948ef71b022932 (patch) | |
| tree | aea58698cfc016852db61f0eedd5f8ffa1a4353a /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | cd433d28118b345ba367420cbed1acd8fb1e4ea3 (diff) | |
| download | bcm5719-llvm-ea91cca593bb543edce86c15c2948ef71b022932.tar.gz bcm5719-llvm-ea91cca593bb543edce86c15c2948ef71b022932.zip | |
[AMDGPU] Add wave barrier builtin
The wave barrier represents the discardable barrier. Its main purpose is to
carry convergent attribute, thus preventing illegal CFG optimizations. All lanes
in a wave come to convergence point simultaneously with SIMT, thus no special
instruction is needed in the ISA. The barrier is discarded during code generation.
Differential Revision: https://reviews.llvm.org/D26585
llvm-svn: 287007
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 17b3265bed0..22143605402 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -3492,6 +3492,9 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { if (DescSize != 0 && DescSize != 4) return DescSize; + if (Opc == AMDGPU::WAVE_BARRIER) + return 0; + // 4-byte instructions may have a 32-bit literal encoded after them. Check // operands that coud ever be literals. if (isVALU(MI) || isSALU(MI)) { |
