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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-29 04:05:06 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-29 04:05:06 +0000 |
| commit | c88ba36eab7c3bbb934addaa0d7707825a2b9c96 (patch) | |
| tree | 51532859d00d4956a9c7687becb6ed98ecdcd5cd /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | c802fc2623cd3e3028e571cb36ef068918a1a5ed (diff) | |
| download | bcm5719-llvm-c88ba36eab7c3bbb934addaa0d7707825a2b9c96.tar.gz bcm5719-llvm-c88ba36eab7c3bbb934addaa0d7707825a2b9c96.zip | |
AMDGPU: Use 1/2pi inline imm on VI
I'm guessing at how it is supposed to be printed
llvm-svn: 285490
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index d8c98e6897b..cdd98c6ae71 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -1725,7 +1725,8 @@ bool SIInstrInfo::isInlineConstant(const APInt &Imm) const { (DoubleToBits(2.0) == Val) || (DoubleToBits(-2.0) == Val) || (DoubleToBits(4.0) == Val) || - (DoubleToBits(-4.0) == Val); + (DoubleToBits(-4.0) == Val) || + (ST.hasInv2PiInlineImm() && Val == 0x3fc45f306dc9c882); } // The actual type of the operand does not seem to matter as long @@ -1746,7 +1747,8 @@ bool SIInstrInfo::isInlineConstant(const APInt &Imm) const { (FloatToBits(2.0f) == Val) || (FloatToBits(-2.0f) == Val) || (FloatToBits(4.0f) == Val) || - (FloatToBits(-4.0f) == Val); + (FloatToBits(-4.0f) == Val) || + (ST.hasInv2PiInlineImm() && Val == 0x3e22f983); } bool SIInstrInfo::isInlineConstant(const MachineOperand &MO, |
