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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-08 00:41:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-08 00:41:48 +0000 |
| commit | 4635915504b7f998962f1cb96ea16d2f2996bd47 (patch) | |
| tree | df3100a367e4749a11d734979ff73694f3bc2a08 /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | 6942d1a034ca52cb5f18f69a646b042413b400c0 (diff) | |
| download | bcm5719-llvm-4635915504b7f998962f1cb96ea16d2f2996bd47.tar.gz bcm5719-llvm-4635915504b7f998962f1cb96ea16d2f2996bd47.zip | |
AMDGPU/SI: Remove VCCReg
llvm-svn: 244380
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index a3456401c72..68c59a1f6ca 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -360,7 +360,7 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, } else { // FIXME: Hack until VReg_1 removed. assert(AMDGPU::VGPR_32RegClass.contains(SrcReg)); - BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC) + BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32)) .addImm(0) .addReg(SrcReg, getKillRegState(KillSrc)); } |
