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| author | David Blaikie <dblaikie@gmail.com> | 2018-03-23 23:58:25 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2018-03-23 23:58:25 +0000 |
| commit | 13e77db2df94b7b959a4965439f2d994d225d908 (patch) | |
| tree | 9898223099215d0eadb51f992f63aab0bff0f905 /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | bf121cf44a9c64e3075a50efb841e4b2e3bf6ba4 (diff) | |
| download | bcm5719-llvm-13e77db2df94b7b959a4965439f2d994d225d908.tar.gz bcm5719-llvm-13e77db2df94b7b959a4965439f2d994d225d908.zip | |
Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)
llvm-svn: 328395
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 35b1df499d7..e7e1bdbd0b1 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -37,7 +37,6 @@ #include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/MachineValueType.h" #include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/CodeGen/SelectionDAGNodes.h" @@ -53,6 +52,7 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MachineValueType.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/TargetMachine.h" #include <cassert> |
