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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-26 14:53:54 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-26 14:53:54 +0000 |
| commit | 1110f14b42129973e33d3546bcd18e008eab2301 (patch) | |
| tree | f0459edea4531d1e642dbc3cb219d636dfa44580 /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | 8fac501602d807da1841447adc799e4c4c25f81e (diff) | |
| download | bcm5719-llvm-1110f14b42129973e33d3546bcd18e008eab2301.tar.gz bcm5719-llvm-1110f14b42129973e33d3546bcd18e008eab2301.zip | |
AMDGPU: Fix counting si_mask_branch as 4 bytes
llvm-svn: 285202
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index fffdeb4b5e0..a7de513dc9a 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -3504,6 +3504,7 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { } switch (Opc) { + case AMDGPU::SI_MASK_BRANCH: case TargetOpcode::IMPLICIT_DEF: case TargetOpcode::KILL: case TargetOpcode::DBG_VALUE: |
