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author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-09-30 16:50:36 +0000 |
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committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-09-30 16:50:36 +0000 |
commit | d7bdf24f32b7f7b7fe81ff38b51d94478a6e3e87 (patch) | |
tree | f883a841876d2eb8fdbff02699f15e2b0eecc1cd /llvm/lib/Target/AMDGPU/SIInsertWaits.cpp | |
parent | 51f514d853183f226af7a7c68730e4a0507c171f (diff) | |
download | bcm5719-llvm-d7bdf24f32b7f7b7fe81ff38b51d94478a6e3e87.tar.gz bcm5719-llvm-d7bdf24f32b7f7b7fe81ff38b51d94478a6e3e87.zip |
[AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction
Differential Revision: https://reviews.llvm.org/D24985
llvm-svn: 282875
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInsertWaits.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIInsertWaits.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp index d24588d6c14..b9551bed256 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp @@ -590,8 +590,9 @@ bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) { // S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish, // but we also want to wait for any other outstanding transfers before // signalling other hardware blocks - if (I->getOpcode() == AMDGPU::S_BARRIER || - I->getOpcode() == AMDGPU::S_SENDMSG) + if ((I->getOpcode() == AMDGPU::S_BARRIER && + ST->needWaitcntBeforeBarrier()) || + I->getOpcode() == AMDGPU::S_SENDMSG) Required = LastIssued; else Required = handleOperands(*I); |