[AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output."

Patch caused a buildbot failure; http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/15733/steps/build_Lld/logs/stdio :
lib/Target/AMDGPU/SIInsertWaitcnts.cpp:396:11: error: private field 'InstCnt' is not used [-Werror,-Wunused-private-field]
  int32_t InstCnt = 0;
          ^
1 error generated.
"
This reverts commit 71627f79010aafe74fdcba901bba28dd7caa0869.

llvm-svn: 320086

1 files changed, 8 insertions, 62 deletions

diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index ea6391a31f8..6bbe5979316 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -54,26 +54,6 @@
 
 using namespace llvm;
 
-static cl::opt<unsigned> ForceZeroFlag(
-  "amdgpu-waitcnt-forcezero",
-  cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)"),
-  cl::init(0), cl::Hidden);
-
-static cl::opt<unsigned> ForceExpFlag(
-  "amdgpu-waitcnt-forceexp",
-  cl::desc("Force emit a s_waitcnt expcnt(0) before the first <n> instrs"),
-  cl::init(0), cl::Hidden);
-
-static cl::opt<unsigned> ForceLgkmFlag(
-  "amdgpu-waitcnt-forcelgkm",
-  cl::desc("Force emit a s_waitcnt lgkmcnt(0) before the first <n> instrs"),
-  cl::init(0), cl::Hidden);
-
-static cl::opt<unsigned> ForceVmFlag(
-  "amdgpu-waitcnt-forcevm",
-  cl::desc("Force emit a s_waitcnt vmcnt(0) before the first <n> instrs"),
-  cl::init(0), cl::Hidden);
-
 namespace {
 
 // Class of object that encapsulates latest instruction counter score
@@ -393,10 +373,6 @@ private:
 
   std::vector<std::unique_ptr<BlockWaitcntBrackets>> KillWaitBrackets;
 
-  int32_t InstCnt = 0;
-  bool ForceZero = false;
-  int32_t ForceSwaitcnt[NUM_INST_CNTS];
-
 public:
   static char ID;
 
@@ -421,14 +397,6 @@ public:
         llvm::make_unique<BlockWaitcntBrackets>(*Bracket));
   }
 
-  bool ForceEmit() const {
-    for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
-         T = (enum InstCounterType)(T + 1))
-      if (ForceSwaitcnt[T] > 0)
-        return true;
-    return false;
-  }
-
   bool mayAccessLDSThroughFlat(const MachineInstr &MI) const;
   MachineInstr *generateSWaitCntInstBefore(MachineInstr &MI,
                                            BlockWaitcntBrackets *ScoreBrackets);
@@ -1055,6 +1023,9 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
     } // End of for loop that looks at all dest operands.
   }
 
+  // TODO: Tie force zero to a compiler triage option.
+  bool ForceZero = false;
+
   // Check to see if this is an S_BARRIER, and if an implicit S_WAITCNT 0
   // occurs before the instruction. Doing it here prevents any additional
   // S_WAITCNTs from being emitted if the instruction was marked as
@@ -1087,7 +1058,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
   }
 
   // Does this operand processing indicate s_wait counter update?
-  if (EmitSwaitcnt || ForceEmit()) {
+  if (EmitSwaitcnt) {
     int CntVal[NUM_INST_CNTS];
 
     bool UseDefaultWaitcntStrategy = true;
@@ -1128,7 +1099,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
     }
 
     // If we are not waiting on any counter we can skip the wait altogether.
-    if (EmitSwaitcnt != 0 || ForceEmit()) {
+    if (EmitSwaitcnt != 0) {
       MachineInstr *OldWaitcnt = ScoreBrackets->getWaitcnt();
       int Imm = (!OldWaitcnt) ? 0 : OldWaitcnt->getOperand(0).getImm();
       if (!OldWaitcnt || (AMDGPU::decodeVmcnt(IV, Imm) !=
@@ -1164,31 +1135,11 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
         CompilerGeneratedWaitcntSet.insert(SWaitInst);
       }
 
-      if (!EmitSwaitcnt) {
-        for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
-             T = (enum InstCounterType)(T + 1)) {
-          if (ForceSwaitcnt[T] > 0 ) {
-            DEBUG(dbgs() << "ForceSwaitcnt[" << T << "]: "
-                  << ForceSwaitcnt[T] << '\n';);
-          }
-        }
-      }
-
       const MachineOperand &Op =
           MachineOperand::CreateImm(AMDGPU::encodeWaitcnt(
-              IV,
-              (ForceSwaitcnt[VM_CNT]   > 0) ? 0 : CntVal[VM_CNT],
-              (ForceSwaitcnt[EXP_CNT]  > 0) ? 0 : CntVal[EXP_CNT],
-              (ForceSwaitcnt[LGKM_CNT] > 0) ? 0 : CntVal[LGKM_CNT]));
+              IV, CntVal[VM_CNT], CntVal[EXP_CNT], CntVal[LGKM_CNT]));
       SWaitInst->addOperand(MF, Op);
 
-      if (!EmitSwaitcnt) {
-        for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
-             T = (enum InstCounterType)(T + 1)) {
-          --ForceSwaitcnt[T];
-        }
-      }
-
       if (CntVal[EXP_CNT] == 0) {
         ScoreBrackets->setMixedExpTypes(false);
       }
@@ -1567,7 +1518,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
   BlockWaitcntBrackets *ScoreBrackets = BlockWaitcntBracketsMap[&Block].get();
 
   DEBUG({
-    dbgs() << "*** Block" << Block.getNumber() << " ***";
+    dbgs() << "Block" << Block.getNumber();
     ScoreBrackets->dump();
   });
 
@@ -1640,7 +1591,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
       DEBUG({ SWaitInst->print(dbgs() << '\n'); });
     }
     DEBUG({
-      dbgs() << "Instr" << ++InstCnt << ": " << Inst;
+      Inst.print(dbgs());
       ScoreBrackets->dump();
     });
 
@@ -1745,11 +1696,6 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
   const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
   AMDGPUASI = ST->getAMDGPUAS();
 
-  ForceZero = ForceZeroFlag;
-  ForceSwaitcnt[VM_CNT] = ForceVmFlag;
-  ForceSwaitcnt[EXP_CNT] = ForceExpFlag;
-  ForceSwaitcnt[LGKM_CNT] = ForceLgkmFlag;
-
   HardwareLimits.VmcntMax = AMDGPU::getVmcntBitMask(IV);
   HardwareLimits.ExpcntMax = AMDGPU::getExpcntBitMask(IV);
   HardwareLimits.LgkmcntMax = AMDGPU::getLgkmcntBitMask(IV);