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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-07-09 21:20:37 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-07-09 21:20:37 +0000 |
| commit | dcb9f0907f15c5a660cf8f9ffe315015af5fcaff (patch) | |
| tree | 7f476842d32d00c57bfc542d38d1fdce7186ec02 /llvm/lib/Target/AMDGPU/SIISelLowering.cpp | |
| parent | d4b351f0def9fa99d835e0100df34bbbd6eb5476 (diff) | |
| download | bcm5719-llvm-dcb9f0907f15c5a660cf8f9ffe315015af5fcaff.tar.gz bcm5719-llvm-dcb9f0907f15c5a660cf8f9ffe315015af5fcaff.zip | |
AMDGPU: Add helper function for implicit parameter offsets.
Patch by: Zoltan Gilian
llvm-svn: 241861
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 40fcc6d049d..eb29aee46c3 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -928,6 +928,7 @@ SDValue SITargetLowering::copyToM0(SelectionDAG &DAG, SDValue Chain, SDLoc DL, SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const { MachineFunction &MF = DAG.getMachineFunction(); + auto MFI = MF.getInfo<SIMachineFunctionInfo>(); const SIRegisterInfo *TRI = static_cast<const SIRegisterInfo *>(Subtarget->getRegisterInfo()); @@ -966,8 +967,7 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::AMDGPU_read_workdim: return LowerParameter(DAG, VT, VT, DL, DAG.getEntryNode(), - MF.getInfo<SIMachineFunctionInfo>()->ABIArgOffset, - false); + getImplicitParameterOffset(MFI, GRID_DIM), false); case Intrinsic::r600_read_tgid_x: return CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass, |
