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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-05-01 16:11:11 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-05-01 16:11:11 +0000 |
| commit | a224f68a10d6191c881dfd27796a2b363aa003d3 (patch) | |
| tree | f42b965dfd7968f261bb868c9c9e4d25e3edef44 /llvm/lib/Target/AMDGPU/SIISelLowering.cpp | |
| parent | 64d57512546e42f45e1f5498e443bc5c580f84f1 (diff) | |
| download | bcm5719-llvm-a224f68a10d6191c881dfd27796a2b363aa003d3.tar.gz bcm5719-llvm-a224f68a10d6191c881dfd27796a2b363aa003d3.zip | |
[AMDGPU] gfx1010 DS implementation
Differential Revision: https://reviews.llvm.org/D61332
llvm-svn: 359696
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index e226914d2ab..6b82ed4e5d3 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -6649,6 +6649,11 @@ SDValue SITargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { std::tie(Ops[0], Ops[1]) = expandUnalignedLoad(Load, DAG); return DAG.getMergeValues(Ops, DL); } + if (Subtarget->hasLDSMisalignedBug() && + AS == AMDGPUAS::FLAT_ADDRESS && + Alignment < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) { + return SplitVectorLoad(Op, DAG); + } MachineFunction &MF = DAG.getMachineFunction(); SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); @@ -7110,6 +7115,12 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { return expandUnalignedStore(Store, DAG); } + if (Subtarget->hasLDSMisalignedBug() && + AS == AMDGPUAS::FLAT_ADDRESS && + Store->getAlignment() < VT.getStoreSize() && VT.getSizeInBits() > 32) { + return SplitVectorStore(Op, DAG); + } + MachineFunction &MF = DAG.getMachineFunction(); SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); // If there is a possibilty that flat instruction access scratch memory |
