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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:21:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:21:48 +0000 |
| commit | 9e22bc2cd30fc8a3f43f740fd93287a76d5115f3 (patch) | |
| tree | 3ce68f6c0d9c342286af8aa7fb1043d550688311 /llvm/lib/Target/AMDGPU/SIISelLowering.cpp | |
| parent | 2920f62423b16ee1d1d9f03254332606cbd147a1 (diff) | |
| download | bcm5719-llvm-9e22bc2cd30fc8a3f43f740fd93287a76d5115f3.tar.gz bcm5719-llvm-9e22bc2cd30fc8a3f43f740fd93287a76d5115f3.zip | |
AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16
llvm-svn: 290307
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index fe8f4a38c64..f907a63141f 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -1847,6 +1847,8 @@ bool SITargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { return Subtarget->hasFP32Denormals() && Subtarget->hasFastFMAF32(); case MVT::f64: return true; + case MVT::f16: + return Subtarget->has16BitInsts() && Subtarget->hasFP16Denormals(); default: break; } |
