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| author | Amaury Sechet <deadalnix@gmail.com> | 2018-06-01 13:21:33 +0000 |
|---|---|---|
| committer | Amaury Sechet <deadalnix@gmail.com> | 2018-06-01 13:21:33 +0000 |
| commit | 8467411dada9e05130e5d8e5244d07749f4fa5e6 (patch) | |
| tree | bba69ff06833d71d0934942e1c9a565436437c16 /llvm/lib/Target/AMDGPU/SIISelLowering.cpp | |
| parent | 5a3bb68e12e4315b9efd662e499cde7e15cdec04 (diff) | |
| download | bcm5719-llvm-8467411dada9e05130e5d8e5244d07749f4fa5e6.tar.gz bcm5719-llvm-8467411dada9e05130e5d8e5244d07749f4fa5e6.zip | |
Set ADDE/ADDC/SUBE/SUBC to expand by default
Summary:
They've been deprecated in favor of UADDO/ADDCARRY or USUBO/SUBCARRY for a while.
Target that uses these opcodes are changed in order to ensure their behavior doesn't change.
Reviewers: efriedma, craig.topper, dblaikie, bkramer
Subscribers: jholewinski, arsenm, jyknight, sdardis, nemanjai, nhaehnle, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, llvm-commits
Differential Revision: https://reviews.llvm.org/D47422
llvm-svn: 333748
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 9145e2e56dc..c33fcd6060b 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -234,9 +234,6 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM, setOperationAction(ISD::SUBCARRY, MVT::i64, Legal); #endif - //setOperationAction(ISD::ADDC, MVT::i64, Expand); - //setOperationAction(ISD::SUBC, MVT::i64, Expand); - // We only support LOAD/STORE and vector manipulation ops for vectors // with > 4 elements. for (MVT VT : {MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32, |
