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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-31 01:38:47 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-31 01:38:47 +0000 |
| commit | 2a64598ef2ec4841dd48483dc368da034d80d933 (patch) | |
| tree | 158052ad93e61e7d7e8879f984057f9074e63fad /llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | |
| parent | 15df273eb45dc53669739bb33388a12c1dfce962 (diff) | |
| download | bcm5719-llvm-2a64598ef2ec4841dd48483dc368da034d80d933.tar.gz bcm5719-llvm-2a64598ef2ec4841dd48483dc368da034d80d933.zip | |
GlobalISel: Fix creating MMOs with align 0
llvm-svn: 352712
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index b574997a6d6..175e2bd84a2 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -420,7 +420,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable, - 0, 0); + 16, 4); unsigned Offset = Fn.getCallingConv() == CallingConv::AMDGPU_CS ? 16 : 0; BuildMI(MBB, I, DL, LoadDwordX4, ScratchRsrcReg) .addReg(Rsrc01) @@ -461,7 +461,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable, - 0, 0); + 8, 4); BuildMI(MBB, I, DL, LoadDwordX2, Rsrc01) .addReg(MFI->getImplicitBufferPtrUserSGPR()) .addImm(0) // offset |
